Kamis, 30 Juni 2011

VACANCY : Various Position @ INTEL penang malaysia




 

Berikut ini adalah lowongan dari INTEL yang nantinya di tempatkan di penang malaysia

Boleh kirim CV-nya ke nirwan_adhiatma@yahoo.com


1)     Staff/Senior CPU Pre-Silicon Design Validation Engineer - 591244
Description
In this position, you will be responsible to validate next generation Intel state-of-the-art microprocessor ensuring they meet product specification and functionality before they are productized into physical chip. You are require working very closely with design teams and architects to implement the low-level RTL design using HDL (Hardware Description Logic) language to ensure overall good functionality of the chip at Pre-Silicon design level. And, you need to develop specific test environment/platform, validation methodology and test plan to validate microprocessor design by identifying and exercising boundary conditions and special cases in an effort to 'break' the chip to find that last elusive bug.
Qualifications
- BSc, MSc or PhD in Electronic/Computer Engineering with minimum 5 years' relevant working experience for Senior positions and 7 years for Staff/Principal positions
- Knowledge & strong interest on Intel Microprocessor Architecture & Micro-Architecture
- Knowledge in PERL*, x86 assembly, HDL (Hardware Description Logic) and other software languages
- Strong communication skills and strong initiative
- Excellent analytical and debug skills, be able to work independently and work at various levels of abstraction (from concept to details)
- Experience with low-level microprocessor RTL (Registered Transfer Level) design
- The ability to write a test focused at a specific feature in the microprocessor

2)     CPU PSV Engineer – 590921

Description

 In this position, you will be working as part of a pre-silicon validation team for future IA-32 Architecture microprocessors. Your responsibilities will include but not be limited to:
- Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide
- Developing and utilizing various validation tools and/or methodologies to implement this plan to insure a solid design before silicon tapeout
- Participating in the debug of failures on silicon and develop new testing strategies to detect these failures on RTL models
 

 

Qualifications

 You should possess a Bachelor of Science degree in Computer Science and/or Electrical Engineering with two years of experience or non. Additional qualifications include:
- Ability to read and interpret technical specs and RTL code
- Ability to write a validation plan and be able to schedule your work to implement that plan
- Ability to communicate effectively with various technical groups and coordinate activities amongst those groups
- Experience with UNIX* and/or Linux* would be an added advantage
- IA-32 programming experience and/or System Verilog* would be an added advantage
- Previous validation and/or testing experience, especially in silicon design team would be an added advantage

3)     Staff/Senior Design Automation Engineers – 591250/595337/594288
Description
In this position, you will be responsible participate in the next generation Electronic Design Automation (EDA) software and methodology development. You will define, implement and improve the state-of-the-art design solutions (EDA tools, flows and methodologies) by sourcing externally or developing the solutions internally; and interact with internal and external stakeholders to drive key deliverables across several business groups, including dealing with external vendor in enabling new design solutions ; and provide the daily EDA tools support to the projects.
Qualifications
- BSc, MSc or PhD in Electronic/Computer Engineering with minimum 5 years' relevant working experience for Senior positions and 7 years for Staff/Principal/Manager positions
- Familiarity with Very Large-Scale Integration (VLSI) Complementary Metal-Oxide Semiconductor (CMOS) logic design and UNIX* OS platform; good understanding of Register Transfer Level (RTL)
- Familiarity with commercial EDA tools, software and database (DB) management, e.g. Cadence* (Virtuoso*, Ultrasim*, Spectre*, SKILL*, Opus*, Conformal*, AMS*, etc.), Synopsys* (VCS*, XA*, ICV*, ICC*, Primetime*, StarRC*, etc.), Mentor Graphics* (0-In*, etc.), Apache* (Totem*, Redhawk*, etc.), Enovia* DesignSync* DB Storage System, OA DB, MySQL, C*/C++*, Perl*/CGI*, TCL*/TK*, PHP*, .Net*, etc
- Ability to work independently and work at various levels of abstraction (from concept to details) such as Very High-level Design Language (VHDL), Verilog*, System Verilog*, schematic, netlist and other hardware description languages

4)     Senior Board Design Engineer – 598621
Description